Verified Commit 7191c519 authored by Andrey Vertiprahov's avatar Andrey Vertiprahov
Browse files

Arista.EOS. Support 40G breakout (4x10 DAC and AOC)

parent 61f8f933
Pipeline #33587 passed with stages
in 25 minutes and 32 seconds
......@@ -18,14 +18,14 @@ class Script(BaseScript):
interface = IGetInterfaceStatus
rx_interface_status = re.compile(
r"^(?P<interface>\S\S\d+).+?" r"(?P<status>connected|notconnect)"
r"^(?P<interface>\S\S[\/\d]+).+?" r"(?P<status>connected|notconnect)"
)
def execute(self, interface=None):
r = []
v = self.cli("show interfaces status")
for l in v.splitlines():
match = self.rx_interface_status.match(l)
for line in v.splitlines():
match = self.rx_interface_status.match(line)
if match:
r += [
{
......
......@@ -25,7 +25,7 @@ class Profile(BaseProfile):
command_disable_pager = "terminal length 0"
convert_mac = BaseProfile.convert_mac_to_cisco
rx_interface_name = re.compile(r"^(?P<type>\S+?)(?P<number>\d+)$")
rx_interface_name = re.compile(r"^(?P<type>\S+?)(?P<number>[\/\d]+)$")
def convert_interface_name(self, s):
match = self.rx_interface_name.match(s)
......
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